4.1 Field of Invention
This invention relates to the Fourier analysis of waveforms produced by circuit simulators. In particular the invention dramatically improves the resolution of the Fourier analysis, allowing small signals to be resolved that would otherwise be hidden in the error created by the simulator.
4.2 Background
A waveform (101 in FIG. 1) is a signal displayed versus time; it is the time-domain representation of a signal. Fourier analysis applied to a waveform transforms the signal to its frequency-domain representation: its spectrum (201 in FIG. 2). The frequency-domain representation is often very useful as it separates the signal components by their frequencies. As a result, very small signal components (203) can be resolved in the presence of much larger components (202) as long as they fall at different frequencies. These small signal components are often undesired artifacts that result from imperfections in the system that generates the signal. The engineers designing the system are often keenly interested in these small components of the signal as a measure of their system's performance. If they are too large the engineers will redesign their system to improve its performance until it meets the required specifications. This process is shown in FIG. 3.
When Fourier analysis is performed on signals produced by circuit simulators such as SPICE†, errors produced within the simulator tend to create a noise floor (204) that acts to reduce the dynamic range of the result (205) and hide these small signals (dynamic range is a measure of the resolution of the Fourier analysis result). If a critical signal component is smaller than the noise floor then it cannot be observed and the performance of the system cannot be measured. Designers become very frustrated when the noise floor of the simulator is high enough to make it impossible to verify that a system meets its performance requirements. †. SPICE is a generic name that represents circuit simulators, programs that take a transistor-level description of a circuit and predict their behavior and performance through simulation. The name derives from a program written by Larry Nagel in the early 1970's. It was the starting point for countless derivative versions such as HPSPICE, TISPICE, etc. At this point the term is used interchangeably with the term circuit simulator, and so refers to all SPICE-like simulators, even those that do not derive from SPICE.
Circuit simulators come with a set of knobs that a designer can use to control the accuracy of the result. The knobs adjust the tolerances and other settings used by the simulator to control accuracy. If the tolerances and such are tightened, the simulator adjusts its behavior so as to reduce the errors, which should lower the noise floor. Unfortunately, it is not uncommon for the noise floor to increase when these settings are tightened. This occurs because the simulator produces two types of error, only one of which causes the noise floor. Tightening the accuracy settings reduces the total error, but may actually increase the error that causes the noise floor.
This idea, that there are two types of error produced by the simulator, is novel and neatly explains the seemingly anomalous behavior of the simulator. It also directly leads to the idea that this error could be eliminated completely. It is well understood that the error produced by a circuit simulators stems from an innate loss of information when transforming a continuous-time representation of the circuit to a discrete-time representation. As a result, one naturally and correctly assumes that a certain level of error is unavoidable. However, the realization that there are two types of error and only one of those acts to reduce the resolution of Fourier analysis leads to the conjecture that it may be possible to eliminate this particular type of error without violating the assumption that there must be some error. And indeed, it is possible to eliminate this type of error. This invention disclosure shows how the error that creates the noise floor can be eliminated, thereby effectively eliminating the noise floor†. †. The term ‘noise floor’ is use here because it is a well-known term that is commonly used to describe a closely related phenomenon, that being the limitation of the resolution of the Fourier analysis due to presence of small stochastic noise sources in the circuit. However, in this case it is assumed that these noise sources in the circuit are not present during the simulation and the observed ‘noise floor’ is actually due to simulator error. Technically simulator error is not noise, even though it appears similar to noise when observed with Fourier analysis. Perhaps the term ‘error floor’ would be more appropriate, however that term is not in common use. In this patent the term ‘error floor’ can be used interchangeably with the ‘noise floor’ with the understanding that if the circuit being simulated did include noise sources the observed noise floor would consist of two components, one from the circuit noise sources and one from the simulator error. This invention eliminates the component of the noise floor due to simulator error without affecting the component due to circuit noise sources.
Consider the circuit shown in FIG. 4, which consists of a sinusoidal current source (402) in parallel with a noiseless resistor (404) and a capacitor (403). Simulating the circuit with transient analysis would produce a waveform like that shown in FIG. 5 at its output (405). Generally the Fourier analysis is applied to one period of the signal (102), shown in FIGS. 5 and 6. For best results the last period is used to give the circuit time to settle. As shown in FIG. 5 the transient analysis interval (504) consists of an initial phase where the signal settles to its steady-state behavior (501), an optional phase where the simulator prepares to perform the Fourier analysis (502), and then the phase where the actual Fourier analysis occurs (503). FIG. 7 shows some of the details of the transient and Fourier analysis. The transient analysis breaks the transient analysis interval into a sequence of possibly non-uniform time steps (701) that are the intervals between time points (702). The circuit equations are solved at these points. During the Fourier analysis interval (503) the signal is sampled uniformly by the Fourier analyzer; meaning that the Fourier sample points (703) are separated in time by the Fourier sample intervals (704), all of which have the same size.
Notice that in FIG. 7 the simulation points (702) and the Fourier sample points (703) coincide. This is not a requirement. Many simulators place their time points without regard to the needs of a subsequent Fourier analysis. In this case the value of the signal at the Fourier sample points would be determined from the values computed by the simulator using interpolation.
4.3 Related Art
Fourier analysis is subject to seven types of error when performed in a circuit simulation context [kundert95]. The errors are:    1. The signal is not periodic in the Fourier analysis interval (503). Or, in other words, the nonperiodicity (601) is not negligible.    2. Fourier analysis begins before the circuit reaches steady state (or the initial transient interval (501) is too short).    3. Aliasing (the duration of the Fourier sample interval (704) is too long to accurately capture the dynamics of the waveform).    4. Interpolation error (simulation points (702) do not coincide with Fourier sample points (703)).    5. Simulation error (approximations made in the simulator corrupt the results somewhat).    6. Modeling error (approximations made in the models corrupt the results somewhat).    7. Limited numerical precision of the computer's representation of numbers.
Most of these errors can be addressed with known techniques.
If the circuit is driven and the response is periodic, then one just needs to choose the Fourier analysis interval so that it equals or is an exact multiple of the signal period (102) to avoid Error 1. If the circuit is autonomous and the response is periodic, then the signal period cannot be known exactly in advance. In this case it is up to the simulator to dynamically determine the period and choose the Fourier analysis interval appropriately. If the response of the circuit is not periodic, then windowing functions should be applied to make the signal appear periodic to the Fourier analyzer, which improves the resolution [harris78].
Error 2 can be avoided by carefully choosing the length of the initial transient interval (501). The simulator can help by determining the non-periodicity (601), which is the difference between the signal at the ends of the Fourier analysis interval, and either reporting it to the user so that he or she can manually increase the length of the initial transient interval if needed, or the simulator could extend the interval automatically.
Aliasing (Error 3) is an error that results from using a Fourier analysis sample interval (704) that is too long to accurately capture the dynamics of the signal. It is eliminated either by increasing the number of Fourier analysis sample points (703) in the Fourier analysis sample interval (503) until the aliasing disappears, or by using the Fourier Integral approach [kundert94] to compute the spectrum. The Fourier Integral approach is the subject of a US patent [kundert97].
Interpolation error (Error 4) is avoided by having the simulator place a time point (702) exactly at each of the Fourier analysis sample points (703), thereby eliminating the interpolation. This can be accomplished using strobing [kundert95].
Error 5, simulator error, is the subject of this patent. Prior to this patent, the only option was to tighten the tolerances of the simulator (these are the knobs described above [7]). However, this can only reduce the problem, not eliminate it. And, as mentioned before, it sometimes exacerbates the problem.
Modeling error (Error 6) is an error in the underlying circuit equations and is often not under the control of the user. It is most often a problem when the models are discontinuous as the discontinuity act to create a noise floor that would hide small signals of interest (203). One only needs to fix the models to avoid this error.
Finally, Error 7, the limited precision of the numbers on the computer, is generally negligible if double precision (64 bit) floating point numbers are used.
All of these errors can be eliminated or reduced to negligible levels using known techniques that involve either proper implementation of the simulator or careful choice of the simulator settings except Error 5, the simulator error. This error cannot be eliminated. However, with this invention, the error can be shaped in such a way that it does not limit the resolution of the Fourier analysis.
4.4 Objects and Advantages
The object of this patent is to prevent simulator errors (Error 5) from limiting the resolution of the Fourier analysis. In this way, designers (307) will be able resolve much smaller signals in the presence of large signals. Such signals generally are either a noise or a distortion and so are undesirable. They tend to be very small on high performance circuits. Being able to resolve them alerts the designer to their presence, which gives the designer the opportunity to improve the design (301) and reduce or eliminate the undesirable signal. Thus, with this invention designers will be able to design higher performance systems with confidence.
Designers often recognize when the resolution of their Fourier analysis is being limited by simulator error. If they need more resolution than they are getting, they will often begin a long and tedious process of trying to adjust the simulator to provide better accuracy. How to do this is often not well understood by designers and sometimes is simply not possible. With this invention, simulator errors and artifacts do not limit the resolution of the Fourier analysis, and so designers do not have to invest large amounts of time adjusting the simulator to get the resolution they need.
Though not widely understood, the way for designers to get the best resolution with existing simulators while performing Fourier analysis, is to coax the simulator to take identical time steps. This runs counter to normal simulator behavior and so is always difficult for the user to accomplish. However, with clocked circuits such as switched-capacitor filters, it is often not possible, or if possible not practical, because the simulator will always place time points on the corners of the clock waveforms, and those simply may not fall on a uniform grid of reasonable step size. In addition, forcing equally spaced points on clocked circuits can significantly slow the simulation. This invention allows clocked circuits to be handled easily without the need for uniform time steps. This makes it considerably more efficient than forcing equally spaced points, and it eliminates any need to modify the clock waveforms to make the simulation easier.